This invention relates to nonlinear processors or distortion generators such as limiters or predistortion equalizers for compensating amplitude and phase distortion of power amplifiers at microwave, millimeter-wave or other radio frequencies, and particularly to those using directional couplers.
Electronic signal amplifiers are used to increase the voltage, current or power of electrical signals. Ideally, amplifiers merely increase the signal amplitude without affecting the signal in any other way. However, all signal amplifiers distort the signal being amplified. The distortion results from nonlinearity of the transfer function or characteristic of the active devices of the amplifier. The distortion of a signal passing through an amplifier can be reduced by keeping the peak-to-peak signal amplitude small, and by operating the amplifier so that the signal traverses the central part of its characteristic, in which region it is most linear. However, there are certain situations in which it is necessary for the output signal excursion to extend over a substantial portion of the amplifier transfer function. This is the case in radio and television broadcast transmitters, where such operation is important to obtain the maximum possible output of power from each costly amplifier. The same need to maximize output power also exists in the case of microwave or millimeter-wave frequency (radio frequency or RF) amplifiers for satellite communications, because the ability of the active devices to operate at RF requires a structure which allows them to be operated only at relatively moderate voltage and current and bias levels, so that the signal swings over a significant portion of the available bias. When the output signal swing of an amplifier makes excursions over substantial portions of the transfer function, the usual effect is a relative compression of large signals by comparison with small signals, i.e. the gain of the amplifier at large signal levels tends to be less than the gain at low signal levels. For the case of a sinusoidal signal viewed on an oscilloscope, the compressed output signal is a sinusoid generally similar in appearance to the input signal, but with a somewhat flattened top and bottom. A phase shift often accompanies amplitude distortion. Radio frequency amplifiers are often used to amplify a plurality of signals, as in multichannel satellite operations. When multiple signals are amplified, the peak signal values occasionally become superposed, causing some excursions with large peak-to-peak values. In the case of multichannel signals, compression may not be as easy a measurement to make as intermodulation distortion measurements. Intermodulation distortion measurements are ordinarily made by measuring the relative amount of unwanted products which accompany one of the carriers, which for test purposes is generally itself unmodulated.
Predistortion of a signal which is to be applied to a nonlinear amplifier is often performed in order to precompensate for the distortion expected to be caused by the amplifier's nonlinearity. Among the problems which arise in the design of predistortion circuits is that of finding a nonlinear device or devices and a corresponding circuit configuration which together produce a gain which increases with increasing signal level, to thereby compensate for the decrease in gain with increasing signal level which is caused by the amplifier nonlinearity. The problem is exacerbated, in that tests during the development phase are often performed on the nonlinear device using instruments which are themselves matched to the impedance of a standard transmission line, whereas in actual service the nonlinear device will interact with the input and output impedances of the source and load circuits, including the amplifier being compensated for. The impedance mismatch of the amplifier may interact adversely with any impedance mismatch of the nonlinear device. Since the impedance mismatch often depends upon signal level, complex interactions may occur, including impedance transformations which cause the net amplitude-versus-frequency response of the cascade of predistortion equalizer and amplifier to deviate from that desired.
FIG. 1a is a simplified block diagram of a typical prior art reflective predistortion equalizer. In FIG. 1, signals to be predistorted are applied by way of a terminal 10 and an input transmission line to a first input port 12 of a 90.degree., 3 dB directional or hybrid coupler 14. Those skilled in the art know that transmission lines are effective in carrying RF signals without excessive losses. Common types of transmission lines include coaxial transmission lines and microstrip transmission lines. The coaxial transmission line, illustrated in cross-section in FIG. 1b, includes an outer electrical conductor 2 surrounding and coaxially centered on a center conductor 3. A microstrip transmission line is illustrated in FIG. 1c. In FIG. 1c, the transmission line includes a broad reference or "ground" conductor illustrated as 5, and a strip conductor 6 spaced away from ground conductor 5 by a dielectric plate 7. The center or strip conductors of both types of transmission lines are biaxially symmetric, in that they are symmetric about a plane, such as plane 9 of FIGS. 1b and 1c. Plane 9 is orthogonal to the surface of the ground or outer conductor. Those skilled in the art know that signals may be transferred from one type of transmission line to another by appropriate couplers, so that the form of the transmission line is only of incidental interest.
As mentioned, the signals to be predistorted are applied by a transmission line to an input port 12 of coupler 14. A 3 dB directional coupler may include two coupled transmission lines such as 13 and 15 of FIG. 1a, which extend from port 12 to a port 28, and from a port 16 to a port 17. Such couplers operate near frequencies at which the portions of transmission lines 13 and 15 which are inductively and capacitively coupled are about .lambda./4 long. When operating with impedance-matched terminations at all the ports, such couplers respond to signals applied to a port such as 12 or 17 by producing at adjacent ports such as 16 or 28, respectively, signals at a reference phase (nominally 0.degree.), and also produce signal at remote ports such as 28 or 16, respectively, which are at a relative phase of 90.degree., i.e. delayed by -90.degree..
In response to signals applied to port 12 of directional coupler 14 of FIG. 1a, signals with nominally 0.degree. phase shift are coupled from directional coupler 14 by way of an output port 16 to a nonlinear network designated generally as 18, which includes a short-circuited attenuator and phase shifter illustrated together as a block 20. The nonlinearity is provided by a distortion generator, designated generally as 22. The particular form of distortion generator 22 illustrated in FIG. 1a is a pair of antiphase or antiparallel diodes 24, 26 as known in the art, for example, from U.S. Pat. No. 4,588,958, issued May 13, 1986 to Katz, et al. Such antiparallel diodes are advantageous by virtue of simplicity, low cost and reliability. Signals applied to input port 12 of hybrid coupler 14 are also coupled with a nominal 90.degree.. phase shift to an output 28 for application to a linear channel designated generally as 30, which includes the cascade of a variable attenuator 32 and a phase shifter 34 short-circuited to ground 8. Signals applied to input terminal 12 are coupled into nonlinear channel 18 and into linear channel 30, are processed and reflected, and the reflected signals are coupled together and to an output port 36. The impedance of the antiparallel diode pair varies significantly as a function of frequency, temperature and power level, with the result that matching networks (not illustrated in FIG. 1a) associated with the diodes must be designed for compromise impedance values, or isolators must be used.
A nonlinearity generator using FET source-to-drain conductive paths is described in U.S. Pat. No. 5,038,113 issued Aug. 6, 1991 in the name of Katz, et al. FIG. 2a is a schematic diagram of a basic transmission predistortion equalizer 78 as described in Katz, et al. '113. Predistortion equalizer 78 uses a field effect transistor (FET) 80 including a source or drain electrode 82, drain or source electrode 84, with a source-to-drain conductive path designated 88 extending therebetween, and a gate electrode 86. Conductive path 88 is connected between an input port 90 and an output port 92 to which a generator 94 and a load 100, respectively, are connected. Generator 94 includes a source 96 of alternating voltage (AC), and also includes an internal impedance illustrated as 98. Internal impedance 98 and load 100 generally match a standard transmission line impedance.
A source of bias designated generally as 110 in FIG. 2a includes first and second voltage sources illustrated as batteries 112 and 114 having their negative and positive terminals, respectively, connected to ground, and their other terminals connected to opposite ends of a potentiometer 116, the wiper 118 of which is connected by way of an isolating element illustrated as a resistor 120 to gate electrode 86.
Additional control of the magnitude or phase of the transmission distortion of the generator of FIG. 2a is achieved by selection of a gate-to-ground impedance (R.+-.JX). An ancillary impedance or matching network illustrated as a dotted block 102 is connected between gate 86 and ground, which in general may be any circuit, however complex. In FIG. 2a, impedance 102 is illustrated as being a variable capacitor. At RF the physical dimensions in wavelengths of the variable capacitor may be such as to introduce a substantial inductive component of reactance, whereby the variable capacitor acts as if it were a series-resonant circuit, illustrated in FIG. 2b. As described in Katz, et al. '113, the distortion provided by distortion equalizer 78 of FIG. 2 varies with both bias voltage and gate-to-ground impedance.
FIG. 3 illustrates a reflective equalizer as described in the Katz '113 patent. In FIG. 3, elements corresponding to those of FIGS. 1a and 2a are designated by the same reference numerals. In FIG. 3, input signals to be equalized are applied by way of a transmission-line input port 10 to a port 12 of a 3 dB quadrature directional coupler 14. Coupler 14 couples the signals, with appropriate phase shifts, to ports 16 and 28. The signal at port 16 is applied by way of a transmission path 310 to the input port 390 of a linear reflective circuit 332 which is coupled or shorted to ground 8. The signals coupled to port 28 of directional coupler 14 are applied by way of a transmission path 312 to the input port 90 of a FET nonlinear reflective circuit such as that of FIG. 2a, in which port 92 is short-circuited to ground 8. Linear reflective circuit 332 and nonlinear reflective circuit 399 of FIG. 3 reflect the signals applied thereto with amplitude and phase which depends upon the component values and the diode bias, and the reflected signals are applied back to ports 16 and 28, respectively, of directional coupler 14. Directional coupler 14 combines the signals reflected to ports 16 and 28 to produce a combined signal which is applied to transmission-line output port 36. Thus, the arrangement of FIG. 8 as a whole is a transmission-type nonlinear circuit for distorting signals as they flow from port 10 to port 36, but it uses reflective circuits internally.
FIG. 4 illustrates the arrangement of FIG. 2 as adapted for use in nonlinear circuit 399 of FIG. 3. In FIG. 4, elements corresponding to those of FIG. 2 are designated by like reference numerals. FIG. 4 differs from FIG. 2 only in that port 92 is connected or short-circuited to ground. Signal applied from source 94 to port 90 flows through the source-to-drain conductive path of FET 80, is reflected at shorted port 92, and again traverses the FET back to input port 90.
FIG. 5 illustrates the use of impedance matching networks. Elements of FIG. 5 corresponding to those of FIGS. 2a and 4 are designated by like reference numerals. In FIG. 5, source or drain electrode 82 is connected to port 90 by way of a matching network 512, and drain or source electrode 84 is connected ground at port 92 by way of a matching network 514. Either or both matching networks 512 or 514 may be used, as known in the art. Matching networks 512 and 514 may each include a single series or shunt element, or networks of elements. As mentioned above, matching network 102 connected between gate electrode 86 and ground may be a complex network. The gate bias arrangement, illustrated in FIG. 5 as 510, couples voltage to gate 86 of FET 80 from a voltage divider illustrated as a pair of resistors 518 and 520. The bias voltage may be varied by adjusting the resistance of variable resistor 518. As an alternative, a potentiometer may be used.
Those skilled in the art know that the gate electrode of a FET forms a capacitance with the source or drain electrodes, and may have some slight conduction. If matching network 512 or 514 include series capacitors, a direct conductive path or galvanic continuity between the controllable conductive path 88 of FET 80 and ground (or other reference voltage) is broken. This in turn may change or eliminate the bias voltage applied between gate 86 and path 88, thereby undesirably affecting bias control of the FET. This may be corrected, when matching network 512 includes a series capacitor, by providing a galvanically conductive impedance to ground from source or drain electrode 82, such as inductor 522 of FIG. 5. Such a structure is often known as a "bias tee." When matching network 514 includes a series capacitor, an impedance such as inductor 524 may be connected to ground from drain or source electrode 84. If both matching networks 512 and 514 include series capacitors, it may be necessary to provide only one inductor such as inductor 522 or 524, rather than both, because of the conduction through controlled path 88. A suitable inductor for frequencies near 4 GHz could be a 0.7 mil (0.007 inch) diameter wire about 0.1 inch long, with one or two turns.
It has been found that a transmission directional coupler using reflective circuits as described in conjunction with FIG. 3 may not match standard transmission line impedances such as 50 ohms or 75 ohms, and it may be difficult to provide adequate matching to the input port of a power amplifier at all power levels. An improved nonlinear processor is desired.